gnupic: Possible 'gpsim' 16F877 EEPROM Data Write Bug
Subject:
Re: Possible 'gpsim' 16F877 EEPROM Data Write Bug
From:
"Tom Alldread, VA7TA" ####@####.####
Date:
16 Oct 2002 20:32:40 -0000
Message-Id: <5.1.0.14.2.20021016131627.00a2ce60@mail.island.net>
Greetings All:
Further to my previous message it occurred to me that I could move the
busy loop further down the sub routine after the interrupt re-enable
statements. This way my timers can interrupt the wait loop and maintain
timing functions while the main program flow is tied up in the wait loop.
It is a bit of compromise but for my application would work OK. I might
just use a conditional assembly statement as suggested by Ross Mitchell -
thanks Ross!
Ross also suggested I should consider fixing the problem by modifying the
'gpsim' source code. Unfortunately I don't currently feel that I have the
necessary programming skills. I wonder if the source code is in the TZ
distribution and if so what is the name of the source file?
TIA!
EXAMPLE C:
;****************************************************************************************
EEProg:
; Program EEPROM byte - enter with data preloaded in global variables
; byte to be written in data1 & address in data0
;****************************************************************************************
btfsc INTCON,GIE ;skip next if global interrupts disabled
at entry
bsf GIEFlag ;set the GIEflag if GIE enabled at entry
bsf STATUS,RP1 ;select bank 2
bcf STATUS,RP0 ;select bank 2
movf data0,w ;get the address
movwf EEADR ;put it in EE adr register
movf data1,w ;get the data
movwf EEDATA ;put it in EE data register
bsf STATUS,RP0 ;select bank3
;EEPLoop ;ensure previous write cycle has completed
; btfsc EECON1,WR ;is write cycle complete?
; goto EEPLoop ;wait for write to finish
;EEReady
bcf EECON1,EEPGD ;point to data memory
bsf EECON1,WREN ;enable EEPROM write
bcf INTCON,GIE ;disable interrupts
movlw h'55'
movwf EECON2 ;write 55
movlw h'AA'
movwf EECON2 ;write AA
bsf EECON1,WR ;start write
btfsc GIEFlag ;enable interrupts only if enabled at entry
bsf INTCON,GIE ;enable interrupts
EEPLoop ;ensure write cycle has completed
btfsc EECON1,WR ;is write cycle complete?
goto EEPLoop ;wait for write to finish
EEReady
bcf EECON1,WREN ;disable writes
RtnBk0 bcf STATUS,RP1 ;select bank 0
bcf STATUS,RP0 ;select bank 0
bcf GIEFlag ;clear the GIE flag
return
;==================================================================================
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