Subject:
re: Proposal for gpdasm feature
From:
####@####.####
Date:
21 Sep 2004 22:23:44 +0100
Message-Id: <24766.1095801796@www7.gmx.net>
Personally, id don't feel, that gpdasm is bad and i don't see any advantage
of writing a configuration file, in order that the disassembler produce more
meaningfull output. You can write it directly in the resulting output file.
It's unix, not windows. You can use sed, vim or ed to substitute the labels.
When you write code, that disassemble the hex file using better labels, use
the
produced map file. But at the same time, you can look into the list file
Or use AWK to reformat the list file.
For decompiling other binary pic files (legal advice ...) use picdis.
It's a gpl file. I use a older release that don't support the 18Fxxx parts.
The latest release should support it. I have included a example of a 16f877
part
below.
This is the orginal source file
http://controls.ae.gatech.edu/gtar/electronics/sonar1.asm
compiled with
gpasm -p16f877 sonar1.asm
and decompiled with
picdis -ip16f877.inc -n sonar1.hex | copt picmac.pp > sonar.asm
Configuration register and id location is not supported by the decompiler
because processor specific. This must be added manually. You can use gpdasm
for retriving
the correct address and values.
The lower case labels are labels called from conditional expressions,
the upper case labels comes from absolute gotos. The number in the label is
the hex address of the label itself. In the case you want the source in
uppercase
(command line switch), the _l0f_ becomes _L0F_ and the _L05_ changes to L05_
.
Unused addresses results in nop's to the decompiler output. The source is
a gpl source. picdis is distributed with a other unix pic macro assembler.
It uses it own internal simulator in order to resolve the register name.
A typical run needs typically 5 seconds in order to simulate and decompile
it.
rx21 = 0x21 ; 0x21
rx22 = 0x22 ; 0x22
rx27 = 0x27 ; 0x27
rx28 = 0x28 ; 0x28
rx29 = 0x29 ; 0x29
rx2a = 0x2a ; 0x2a
rx2b = 0x2b ; 0x2b
rx186 = 0x186 ; 0x6
rx190 = 0x190 ; 0x10
rx195 = 0x195 ; 0x15
rx196 = 0x196 ; 0x16
rx1a1 = 0x1a1 ; 0x21
rx1a2 = 0x1a2 ; 0x22
rx1a3 = 0x1a3 ; 0x23
rx1a4 = 0x1a4 ; 0x24
rx1a5 = 0x1a5 ; 0x25
rx1a7 = 0x1a7 ; 0x27
rx1a8 = 0x1a8 ; 0x28
rx1a9 = 0x1a9 ; 0x29
rx1aa = 0x1aa ; 0x2a
rx1ab = 0x1ab ; 0x2b
org 0
goto _L05_
nop
nop
nop
goto _L0de_
_L05_:
call _L017_
_L06_:
call _L03e_
movlf 0x7 , rx21
_l09_:
call _L0d5_
decfsz rx21
goto _l09_
call _L097_
call _L068_
call _L053_
movlf 0x7 , rx21
_l011_:
call _L0d5_
decfsz rx21
goto _l011_
call _L097_
call _L068_
goto _L06_
_L017_:
bank_1
movlf 0x7 , ADCON1
clrf TRISA
clrf TRISB
movlf 0x4 , TRISC
movlf 0xf0 , TRISD
clrf TRISE
movlf 0xf9 , PR2
movlf 0x4 , PIE1
movlf 0x1 , PIE2
movlf 0x24 , TXSTA
movlf 0x19 , SPBRG
bank_0
movlf 0x4d , T2CON
movlf 0 , T1CON
movlf 0x5 , CCP1CON
movlf 0xa , CCP2CON
clrf PORTA
clrf PORTB
clrf PORTC
clrf PORTD
clrf PORTE
movlf 0x80 , RCSTA
movlf 0xc0 , INTCON
return
_L03e_:
movlf 0xe8 , CCPR2L
movlf 0x3 , CCPR2H
clrf TMR1L
clrf TMR1H
clrf CCPR1L
clrf CCPR1H
clrf PORTB
movlf 0x2 , rx27
bsf PORTB , 0
bsf T1CON , TMR1ON
movlf 0x8c , FSR
bcf INDF , 2
call _L0d9_
movlf 0x8c , FSR
bsf INDF , 2
return
_L053_:
movlf 0xe8 , CCPR2L
movlf 0x3 , CCPR2H
clrf TMR1L
clrf TMR1H
clrf CCPR1L
clrf CCPR1H
clrf PORTB
movlf 0x20 , rx27
bsf PORTB , 4
bsf T1CON , TMR1ON
movlf 0x8c , FSR
bcf INDF , 2
call _L0d9_
movlf 0x8c , FSR
bsf INDF , 2
return
_L068_:
brclr PIR1 , TXIF , _L068_
mov rx2b , TXREG
_l06c_:
brclr PIR1 , TXIF , _l06c_
mov rx2a , TXREG
_l070_:
brclr PIR1 , TXIF , _l070_
mov rx2a , TXREG
_l074_:
brclr PIR1 , TXIF , _l074_
mov rx29 , TXREG
_l078_:
brclr PIR1 , TXIF , _l078_
mov rx29 , TXREG
_l07c_:
brclr PIR1 , TXIF , _l07c_
mov rx28 , TXREG
_l080_:
brclr PIR1 , TXIF , _l080_
mov rx28 , TXREG
_l084_:
brclr PIR1 , TXIF , _l084_
movlf 0xd , TXREG
_l088_:
brclr PIR1 , TXIF , _l088_
movlf 0xd , TXREG
_l08c_:
brclr PIR1 , TXIF , _l08c_
movlf 0xa , TXREG
_l090_:
brclr PIR1 , TXIF , _l090_
movlf 0xa , TXREG
_l094_:
brclr PIR1 , TXIF , _l094_
return
_L097_:
mov rx22 , rx21
movlw 0xf
andwf rx21
movlw 0xa
subwf rx21 , W
bnc _l0a3_
decf rx21 , W
andlw 0x7
addlw 0x40
goto _L0a5_
_l0a3_:
movfw rx21
addlw 0x30
_L0a5_:
movwf rx28
mov rx22 , rx21
swapf rx21
movlw 0xf
andwf rx21
movlw 0xa
subwf rx21 , W
bnc _l0b3_
decf rx21 , W
andlw 0x7
addlw 0x40
goto _L0b5_
_l0b3_:
movfw rx21
addlw 0x30
_L0b5_:
movwf rx29
mov rx23 , rx21
movlw 0xf
andwf rx21
movlw 0xa
subwf rx21 , W
bnc _l0c2_
decf rx21 , W
andlw 0x7
addlw 0x40
goto _L0c4_
_l0c2_:
movfw rx21
addlw 0x30
_L0c4_:
movwf rx2a
swapf rx23 , W
movwf rx21
movlw 0xf
andwf rx21
movlw 0xa
subwf rx21 , W
bnc _l0d1_
decf rx21 , W
andlw 0x7
addlw 0x40
goto _L0d3_
_l0d1_:
movfw rx21
addlw 0x30
_L0d3_:
movwf rx2b
return
_L0d5_:
brclr PIR1 , TMR2IF , _L0d5_
bcf PIR1 , TMR2IF
return
_L0d9_:
movlf 0x28 , rx21
_l0db_:
decfsz rx21
goto _l0db_
return
_L0de_:
movwf rx24
swapf STATUS , W
movwf rx25
_L0e1_:
brset PIR1 , CCP1IF , _l0ea_
brset PIR2 , CCP2IF , _l0f3_
swapf rx25 , W
movwf STATUS
swapf rx24
swapf rx24 , W
retfie
_l0ea_:
bcf PIR1 , CCP1IF
bcf T1CON , TMR1ON
mov CCPR1L , rx22
mov CCPR1H , rx23
call _L0d5_
clrf PORTB
goto _L0e1_
_l0f3_:
bcf PIR2 , CCP2IF
movfw rx27
xorwf PORTB
goto _L0e1_
and the required include file picmac.inc :
;
; picmac.i
;
NOLIST
skipc macro ; skip if carry
btfss STATUS,C
endm
skipnc macro ; skip if not carry
btfsc STATUS,C
endm
skipz macro ; skip if zero
btfss STATUS,Z
endm
skipnz macro ; skip if not zero
btfsc STATUS,Z
endm
skpos macro r1 ; skip if reg >= 0 (reg)
btfsc r1,7
endm
skneg macro r1 ; skip if reg < 0 (reg)
btfss r1,7
endm
bpos macro r1,r2 ;branch if reg >= 0 (reg,dest_addr)
btfss r1,7
goto r2
endm
bneg macro r1,r2 ;branch if reg < 0 (reg,dest_addr)
btfsc r1,7
goto r2
endm
brset macro r1,r2,r3 ;branch if bit set (reg,bit,dest_addr)
btfsc r1,r2
goto r3
endm
brclr macro r1 , r2, r3 ;branch if bit clear (reg,bit,dest_addr)
btfss r1,r2
goto r3
endm
mov macro r1,r2 ;move register reg1 to reg2 trought W
movfw r1
movwf r2
endm
movlf macro r1,r2 ;move register reg1 to reg2 trought W
movlw r1
movwf r2
endm
; compatible page macros
bank_0 macro
bcf STATUS , RP0
endm
bank_1 macro
bsf STATUS , RP0
endm
; compatible page macros
ibank_0 macro
bcf STATUS , IRP
endm
ibank_1 macro
bsf STATUS , IRP
endm
LIST
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