gnupic: [PATCH] gpal Code for the 16e Family


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Previous in thread: 13 Oct 2004 06:46:53 +0100 [PATCH] gpal Code for the 16e Family, Robert James Kaes
Next in thread: 13 Oct 2004 06:46:53 +0100 Re: [PATCH] gpal Code for the 16e Family, Robert James Kaes

Subject: Re: [PATCH] gpal Code for the 16e Family
From: Craig Franklin ####@####.####
Date: 13 Oct 2004 06:46:53 +0100
Message-Id: <416C7B28.5010308@users.sourceforge.net>

Thanks for the patch.

I haven't finished the 18f devices.  If you command "gpal -l" they 
aren't listed.  That explains some of the errors.

Please continue working on it if you like.  I have a TODO list if you 
run out of things to work on.  Don't spend any time improving the 
banksel.  I have a big patch for it that is mostly done.

Robert James Kaes wrote:

>Craig,
>
>  [ Resent because my mailer screwed up the Sender header. ]
>
>While investigating gpal for use with the PIC18F chips I have
>available, I noticed a few places in the codegen16e.c file that could
>be improved.  I have included my patch against this file.  It removes
>unneeded BANKSEL calls before accessing the FSR0L register.  (They are
>not required since FSR0L and FSR0H are available in the SFR section of
>the chip.)  I have also replaced the GOTOs with BRAs in the various
>loops.  This saves one word for each GOTO replaced.
>
>There is one other problem with gpal for 16e family chips.  The
>codegen_close_asm() function in codegen.c is not right for 16e chips.
>Their interrupt vector begins at 0x8, not the 0x4 use in the function.
>Also, much of the preamble code emitted is not needed for a 16e chip.
>I think it would be better to split the codegen_close_asm() function
>into two: one for the 14 family, and one for the 16e family.  The
>codegen_close_asm() function could then call the correct function
>based on the chip in use.  The function_pointer_struct could contain
>one more entry for the chip specific codegen_close_asm() function.  I
>could whip up a patch for this if you like.
>
>Thanks for the great utility!
>        -- Robert
>
>
>Index: codegen16e.c
>===================================================================
>RCS file: /cvsroot/gputils/gputils/gpal/codegen16e.c,v
>retrieving revision 1.1
>diff -u -u -r1.1 codegen16e.c
>--- codegen16e.c	30 Aug 2004 01:19:39 -0000	1.1
>+++ codegen16e.c	12 Oct 2004 18:47:28 -0000
>@@ -200,16 +200,12 @@
> 
>   num_bytes = prim_size(size);
> 
>-
>-  codegen_write_asm("banksel FSR0L");
>   codegen_write_asm("movlw 0");
>   for (i = 0; i < num_bytes; i++) {
>     codegen_write_asm("movff INDF0, %s + %i", WORKING_LABEL, i);
>     codegen_write_asm("incf FSR0L, f");
>     codegen_write_asm("addwfc FSR0H, f");
>   }
>-  codegen_write_asm("banksel %s", WORKING_LABEL);
>-
> }
> 
> /* The byte address is in FSR.  Store the working register in memory. */
>@@ -230,15 +226,12 @@
> 
>   num_bytes = prim_size(size);
> 
>-  codegen_write_asm("banksel FSR0L");
>   codegen_write_asm("movlw 0");
>   for (i = 0; i < num_bytes; i++) {
>     codegen_write_asm("movff %s + %i, INDF0", WORKING_LABEL, i);
>     codegen_write_asm("incf FSR0L, f");
>     codegen_write_asm("addwfc FSR0H, f");
>   }
>-  codegen_write_asm("banksel %s", WORKING_LABEL);
>-
> }
> 
> /* convert the working register into a boolean */
>@@ -363,14 +356,11 @@
> 
>   num_bytes = prim_size(size);
> 
>-  codegen_write_asm("banksel FSR0L");
>   for (i = 0; i < num_bytes; i++) {
>     codegen_write_asm("clrf INDF");
>     codegen_write_asm("incf FSR0L, f");
>     codegen_write_asm("addwfc FSR0H, f");
>   }
>-  codegen_write_asm("banksel %s", WORKING_LABEL);
>-
> }
> 
> static void
>@@ -414,10 +404,10 @@
>     ADD_BANKSEL(name);
>     codegen_write_asm("incf %s%s, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("incf %s%s + 1, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("incf %s%s + 2, f", name, offset_buffer);
>     codegen_write_label(label);
>     ADD_BANKSEL(LOCAL_DATA_LABEL);
>@@ -428,13 +418,13 @@
>     ADD_BANKSEL(name);
>     codegen_write_asm("incf %s%s, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("incf %s%s + 1, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("incf %s%s + 2, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("incf %s%s + 3, f", name, offset_buffer);
>     codegen_write_label(label);
>     ADD_BANKSEL(LOCAL_DATA_LABEL);
>@@ -466,7 +456,7 @@
>   for (i = 0; i < num_bytes; i++) {
>     codegen_write_asm("incf INDF, f");
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("incf FSR0L, f");
>     codegen_write_asm("addwfc FSR0H, f");
>   }
>@@ -519,10 +509,10 @@
>     ADD_BANKSEL(name);
>     codegen_write_asm("decf %s%s, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("decf %s%s + 1, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("decf %s%s + 2, f", name, offset_buffer);
>     codegen_write_label(label);
>     ADD_BANKSEL(LOCAL_DATA_LABEL);
>@@ -533,13 +523,13 @@
>     ADD_BANKSEL(name);
>     codegen_write_asm("decf %s%s, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("decf %s%s + 1, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("decf %s%s + 2, f", name, offset_buffer);
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("decf %s%s + 3, f", name, offset_buffer);
>     codegen_write_label(label);
>     ADD_BANKSEL(LOCAL_DATA_LABEL);
>@@ -571,7 +561,7 @@
>   for (i = 0; i < num_bytes; i++) {
>     codegen_write_asm("decf INDF, f");
>     codegen_write_asm("btfss STATUS, C");
>-    codegen_write_asm("goto %s", label);
>+    codegen_write_asm("bra %s", label);
>     codegen_write_asm("incf FSR0L, f");
>     codegen_write_asm("addwfc FSR0H, f");
>   }
>@@ -1053,11 +1043,11 @@
>       codegen_write_asm("movwf %s", reg2);
>       codegen_write_label(label1);
>       codegen_write_asm("btfsc STATUS, Z");
>-      codegen_write_asm("goto %s", label2);
>+      codegen_write_asm("bra %s", label2);
>       codegen_write_asm("bcf STATUS, C");
>       codegen_write_asm("rlf %s, f", reg1);
>       codegen_write_asm("decf %s, f", reg2);
>-      codegen_write_asm("goto %s", label1);
>+      codegen_write_asm("bra %s", label1);
>       codegen_write_label(label2);
>       codegen_write_asm("movf %s, w", reg1);  /* move the result into w */
>     }
>@@ -1081,11 +1071,11 @@
>     codegen_write_asm("movwf %s", reg1);
>     codegen_write_label(label1);
>     codegen_write_asm("btfsc STATUS, Z");
>-    codegen_write_asm("goto %s", label2);
>+    codegen_write_asm("bra %s", label2);
>     codegen_write_asm("bcf STATUS, C");
>     left_shift(size);
>     codegen_write_asm("decf %s, f", reg1);
>-    codegen_write_asm("goto %s", label1);
>+    codegen_write_asm("bra %s", label1);
>     codegen_write_label(label2);
>     break;
>   case size_float:
>@@ -1169,7 +1159,7 @@
>       codegen_write_asm("movwf %s", reg2);
>       codegen_write_label(label1);
>       codegen_write_asm("btfsc STATUS, Z");
>-      codegen_write_asm("goto %s", label2);
>+      codegen_write_asm("bra %s", label2);
>       if (is_signed) {
>         /* put the sign in the carry */
>         codegen_write_asm("rlf %s, w", reg1);
>@@ -1178,7 +1168,7 @@
>       }
>       codegen_write_asm("rrf %s, f", reg1);
>       codegen_write_asm("decf %s, f", reg2);
>-      codegen_write_asm("goto %s", label1);
>+      codegen_write_asm("bra %s", label1);
>       codegen_write_label(label2);
>       codegen_write_asm("movf %s, w", reg1);  /* move the result into w */
>     }
>@@ -1204,11 +1194,11 @@
>     codegen_write_asm("movwf %s", reg1);
>     codegen_write_label(label1);
>     codegen_write_asm("btfsc STATUS, Z");
>-    codegen_write_asm("goto %s", label2);
>+    codegen_write_asm("bra %s", label2);
>     codegen_write_asm("bcf STATUS, C");
>     right_shift(size, is_signed);
>     codegen_write_asm("decf %s, f", reg1);
>-    codegen_write_asm("goto %s", label1);
>+    codegen_write_asm("bra %s", label1);
>     codegen_write_label(label2);
>     break;
>   case size_float:
>
>  
>


Previous by date: 13 Oct 2004 06:46:53 +0100 [PATCH] gpal Code for the 16e Family, Robert James Kaes
Next by date: 13 Oct 2004 06:46:53 +0100 Re: gpsim's gui, Scott Dattalo
Previous in thread: 13 Oct 2004 06:46:53 +0100 [PATCH] gpal Code for the 16e Family, Robert James Kaes
Next in thread: 13 Oct 2004 06:46:53 +0100 Re: [PATCH] gpal Code for the 16e Family, Robert James Kaes


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