gnupic: CONFIG feature progress
Subject:
CONFIG feature progress
From:
Michael Ballbach ####@####.####
Date:
19 Jan 2006 02:23:18 +0000
Message-Id: <20060119022201.GA17503@wayreth.rten.net>
I've managed to write a python script that can extract all of the
relevant CONFIG PIC18F style configuration data from the MPASMWIN.EXE
executable file. It was my opinion that it would be perilous to have to
put the entire database together by hand, and, the data was pretty
apparent in the executable.
The upside of this is that it is very easy to generate, say, a header
file or text file full of all the configuration data. The downside is
that the script is mated to a particular version of MPASMWIN.EXE, and
might or might not work on newer versions (though, unless microchip
changes how they track this data internally significantly, updating it
shouldn't be too hard).
Please look at:
http://wayreth.rten.net/~ballbach/config-testing-ext.tbz2
This tarball contains the python script and a pre-generated header file
and simple C program to make use of it. It does not contain an
MPASMWIN.EXE executable, but if you want to try to run the python
script, you should use the 7.30 MPLAB version. Well, it might work with
nearby versions, but I've only tried it with 7.30.
Anyway, now that this is here, it should be pretty easy to write the
actual bits into MPASM. However, to increase the chance of it being an
acceptable implementation for the community, I'd like input on a few
points:
1) I'm assuming no one else is working on this. I asked about it four
or five days ago and haven't heard anything. If someone is already
doing this I don't want to step on their toes.
2) Would people prefer that this data get written to a configuration
file so that it can be extended by users without recompiling?
3) Does anyone foresee any issues with using this data as gleamed from
the MPASMWIN.EXE file? It is reverse-engineering in a way, but all the
data extracted is publicly available elsewhere.
Here is the output from the test C program, if you're just curious:
$ ./config-testing/pcfg PIC18F2455
Device: PIC18F2455
Configuration Addresses:
0x300000 - def 0x2f (PLLDIV:12 CPUDIV:OSC2_PLL3 USBDIV:2)
PLLDIV - mask 0x07
1 - value 0x00
2 - value 0x01
3 - value 0x02
4 - value 0x03
5 - value 0x04
6 - value 0x05
10 - value 0x06
12 - value 0x07
CPUDIV - mask 0x18
OSC1_PLL2 - value 0x00
OSC2_PLL3 - value 0x08
OSC3_PLL4 - value 0x10
OSC4_PLL6 - value 0x18
USBDIV - mask 0x20
1 - value 0x00
2 - value 0x20
0x300001 - def 0x05 (FOSC:EC_EC FCMEM:OFF IESO:OFF)
FOSC - mask 0x0f
XT_XT - value 0x00
XTPLL_XT - value 0x02
ECIO_EC - value 0x04
EC_EC - value 0x05
ECPLLIO_EC - value 0x06
ECPLL_EC - value 0x07
INTOSCIO_EC - value 0x08
INTOSC_EC - value 0x09
INTOSC_XT - value 0x0a
INTOSC_HS - value 0x0b
HS - value 0x0c
HSPLL_HS - value 0x0e
FCMEM - mask 0x40
OFF - value 0x00
ON - value 0x40
IESO - mask 0x80
OFF - value 0x00
ON - value 0x80
0x300002 - def 0x0f (PWRT:OFF BOR:ON BORV:43 VREGEN:OFF)
PWRT - mask 0x01
ON - value 0x00
OFF - value 0x01
BOR - mask 0x06
OFF - value 0x00
SOFT - value 0x02
ON_ACTIVE - value 0x04
ON - value 0x06
BORV - mask 0x18
46 - value 0x00
43 - value 0x08
28 - value 0x10
21 - value 0x18
VREGEN - mask 0x20
OFF - value 0x00
ON - value 0x20
0x300003 - def 0x1f (WDT:ON WDTPS:32768)
WDT - mask 0x01
OFF - value 0x00
ON - value 0x01
WDTPS - mask 0x1e
1 - value 0x00
2 - value 0x02
4 - value 0x04
8 - value 0x06
16 - value 0x08
32 - value 0x0a
64 - value 0x0c
128 - value 0x0e
256 - value 0x10
512 - value 0x12
1024 - value 0x14
2048 - value 0x16
4096 - value 0x18
8192 - value 0x1a
16384 - value 0x1c
32768 - value 0x1e
0x300005 - def 0x80 (MCLRE:ON LPT1OSC:OFF PBADEN:OFF CCP2MX:OFF)
MCLRE - mask 0x80
OFF - value 0x00
ON - value 0x80
LPT1OSC - mask 0x04
OFF - value 0x00
ON - value 0x04
PBADEN - mask 0x02
OFF - value 0x00
ON - value 0x02
CCP2MX - mask 0x01
OFF - value 0x00
ON - value 0x01
0x300006 - def 0x85 (STVREN:ON LVP:ON ICPRT:OFF XINST:OFF DEBUG:OFF)
STVREN - mask 0x01
OFF - value 0x00
ON - value 0x01
LVP - mask 0x04
OFF - value 0x00
ON - value 0x04
ICPRT - mask 0x20
OFF - value 0x00
ON - value 0x20
XINST - mask 0x40
OFF - value 0x00
ON - value 0x40
DEBUG - mask 0x80
ON - value 0x00
OFF - value 0x80
0x300008 - def 0x0f (CP0:OFF CP1:OFF CP2:OFF CP3:OFF)
CP0 - mask 0x01
ON - value 0x00
OFF - value 0x01
CP1 - mask 0x02
ON - value 0x00
OFF - value 0x02
CP2 - mask 0x04
ON - value 0x00
OFF - value 0x04
CP3 - mask 0x08
ON - value 0x00
OFF - value 0x08
0x300009 - def 0xc0 (CPB:OFF CPD:OFF)
CPB - mask 0x40
ON - value 0x00
OFF - value 0x40
CPD - mask 0x80
ON - value 0x00
OFF - value 0x80
0x30000a - def 0x0f (WRT0:OFF WRT1:OFF WRT2:OFF WRT3:OFF)
WRT0 - mask 0x01
ON - value 0x00
OFF - value 0x01
WRT1 - mask 0x02
ON - value 0x00
OFF - value 0x02
WRT2 - mask 0x04
ON - value 0x00
OFF - value 0x04
WRT3 - mask 0x08
ON - value 0x00
OFF - value 0x08
0x30000b - def 0xe0 (WRTB:OFF WRTC:OFF WRTD:OFF)
WRTB - mask 0x40
ON - value 0x00
OFF - value 0x40
WRTC - mask 0x20
ON - value 0x00
OFF - value 0x20
WRTD - mask 0x80
ON - value 0x00
OFF - value 0x80
0x30000c - def 0x0f (EBTR0:OFF EBTR1:OFF EBTR2:OFF EBTR3:OFF)
EBTR0 - mask 0x01
ON - value 0x00
OFF - value 0x01
EBTR1 - mask 0x02
ON - value 0x00
OFF - value 0x02
EBTR2 - mask 0x04
ON - value 0x00
OFF - value 0x04
EBTR3 - mask 0x08
ON - value 0x00
OFF - value 0x08
0x30000d - def 0x40 (EBTRB:OFF)
EBTRB - mask 0x40
ON - value 0x00
OFF - value 0x40
--
Michael Ballbach, N0ZTQ
####@####.#### -- PGP KeyID: 0xA05D5555
http://www.rten.net/
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