gnupic: SDCC in the bank
Subject:
SDCC in the bank
From:
Scott Dattalo ####@####.####
Date:
22 Jan 2002 06:52:45 -0000
Message-Id: <Pine.LNX.4.33.0201212221240.22164-100000@ruckus.brouhaha.com>
Register bank that is. SDCC PIC port now supports banked register
accesses. This required a fairly significant rewrite of the whole register
allocation scheme. It's still rather new and fails under some obscure, but
fixable situations (in other words, it's only been working for 5 minutes
or so now). Here's a working example:
/* Declare a variable in bank 1 */
data at 0xa0 unsigned char uc_bank1_temp;
void main(void)
{
ui_bank1_temp = 0; /* clear a variable in bank 1 */
}
This generated:
;#CSRC bank1.c 21
;; *** resultRemat 2427
;; *** genAssign 8529
;; *** aopForSym 426
;; 512 sym->rname = _uc_bank1_temp, size = 1
;; line = 8538 result AOP_DIR=_uc_bank1_temp, left -=-, right
AOP_LIT=0x00, size = 1
;; *** genAssign 8612
BSF STATUS,5
CLRF _uc_bank1_temp
BCF STATUS,5
----
(The AOP_LIT line is just a long line that has wrapped around)
The register banking issue is dealt with after the code has been
generated. In other words, I make another pass through the assembly after
the registers have been assigned physical addresses and try to fix up the
status register so that the proper bank is accessed. This can lead to some
interesting scenarios. Consider this obscure piece of code:
btfss bank0_var1,0
btfsc bank1_var2,2
incf bank3_var3,f
In other words, three consecutive instructions accessing three different
banks, and complicated with skipping. This can be converted to:
btfss bank0_var1,0
goto X1
L1 goto X2
L2
...
X1 bsf status,rp0
btfss bank1_var2,0 ;the original instruction
goto X1_a
bcf status,rp0
goto L2
X1_a
bcf status,rp0
goto L1
X2 bsf status,rp1
incf bank2_var3,f ;the original instruction
bcf status,rp1
goto L2
It's darned ugly, but should work in all cases. This is not implemented
yet, btw. I'm open to suggestions on how it may be improved. (Or on how
banking can be dealt with in general).
Scott