gnupic: Thread: gpsim interrupt bug

Hi Folks,

  A few days ago I found an interrupt related bug in gpsim-0.20.14.  
Basically the problem was if an interrupt was generated while your program 
counter was not in code page 0 you would jump to the interrupt vector 
(0x04) on the current code page.  Needless to say, bad things would 
happen since you wouldn't end up in your interrupt handler.  Also when
you then exit the interrupt its important to set to code page back to 
where you came from.

  I generated a small patch to address this issue and attached it.

Brian

diff -ur ../../gpsim-0.20.14-orig/src/14bit-processors.cc ./14bit-processors.cc
--- ../../gpsim-0.20.14-orig/src/14bit-processors.cc	Tue Dec 18 21:56:21 2001
+++ ./14bit-processors.cc	Wed Apr  2 10:27:23 2003
@@ -91,6 +91,10 @@
 
   trace.cycle_increment();
 
+  // Ensure the code page is set to zero, otherwise if we handle
+  // an interrupt on a different code page we won't jump to the
+  // proper interrupt vector.
+  pclath.value &= ~0x18;
   pc.jump(INTERRUPT_VECTOR);
 
 }
diff -ur ../../gpsim-0.20.14-orig/src/14bit-registers.cc ./14bit-registers.cc
--- ../../gpsim-0.20.14-orig/src/14bit-registers.cc	Thu Jan  3 14:05:37 2002
+++ ./14bit-registers.cc	Wed Apr  2 10:34:19 2003
@@ -619,11 +619,9 @@
 
 void Program_Counter::jump(unsigned int new_address)
 {
-
-  // Use the new_address and the cached pclath (or page select bits for 12 bit cores)
-  // to generate the destination address:
-
-  value = (new_address | cpu->get_pclath_branching_jump() ) & memory_size_mask;
+  // Use the new_address and the cached pclath (or page select bits for 12 
+  // bit cores) to generate the destination address:
+  value = (new_address | cpu->get_pclath_branching_jump()) & memory_size_mask;
 
   cpu->pcl.value = value & 0xff;    // see Update pcl comment in Program_Counter::increment()
   
@@ -671,6 +669,12 @@
   trace.program_counter(value);
 
   cpu->pcl.value = value & 0xff;    // see Update pcl comment in Program_Counter::increment()
+  // When jumping to a new address ensure the code page is set properly
+  // for the address in question.  This normally does not need to be done
+  // but if your returning from an interrupt, and you trigger the interrupt
+  // from a code page other than zero you'll end up at the wrong instruction.
+  cpu->pclath.value = (cpu->pclath.value & ~0x18) | ((new_value >> 8) & 0x18);
+
   cpu->cycles.increment();
   cpu->cycles.increment();
 }